Name: Xicai Yue

Email: xyue@brookes.ac.uk

CompanyName: Oxford Brookes University

Country: U K

Abstract: OXBACT5-
A New FPGA Based EIT Data Acquisition System

Xicai Yue, Chris McLeod and Andrea Borsic
School of Engineering, Oxford Brookes University
Oxford OX3 0BP, UK
E-mail: xyue@brookes.ac.uk

Abstract
The data acquisition system is an important part of EIT (Electrical impedance tomograph), implementing many functions such as excitation signal generation, multi-channel control and demodulation. The traditional method uses isolated chips connected together on printed circuit boards, so there is no flexibility, as that traditional hardware circuit cannot easily be changed. Some EIT applications also need a very high rate of data transfer, readily found in more recent devices. Therefore new hardware technology should be adopted in EIT data acquisition systems. FPGA (field programmable gate array) and ASIC (application specific integrated circuit) hardware technology can integrate many functions of isolated chips in a single FPGA chip to reduce the printed board size and can also be dynamically reconfigured to suit different system applications. So it is better to introduce FPGA to EIT systems as FPGAs have many additional advantages such as small size and high reliability, ve!
ry high working frequency, and are easy to use (especially with VHDL, the high level program language). In this paper, a traditional data acquisition system is analysed to determine which functions can be implemented in an FPGA, then all of the design notes for FPGA’s EIT application are discussed in detail. We discuss the implementation of EIT function blocks of excitation signal generation with FPGA’s DDS (direct digital synthesis), using PCI bus in FPGA for high rate data transfers as well as the implementations of traditional EIT function blocks of FIFOs (first in first out) memories, counters, and RAM in the same FPGA chip. A test result of one FPGA chip based EIT data acquisition system is also given in the paper.

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